diff --git a/drivers/gpu/msm/adreno.c b/drivers/gpu/msm/adreno.c index e5465f46..8f35effd 100755 --- a/drivers/gpu/msm/adreno.c +++ b/drivers/gpu/msm/adreno.c @@ -139,31 +139,35 @@ static const struct { struct adreno_gpudev *gpudev; unsigned int istore_size; unsigned int pix_shader_start; + unsigned int instruction_size; /* Size of an instruction in dwords */ } adreno_gpulist[] = { { ADRENO_REV_A200, 0, 2, ANY_ID, ANY_ID, "yamato_pm4.fw", "yamato_pfp.fw", &adreno_a2xx_gpudev, - 512, 384}, + 512, 384, 3}, { ADRENO_REV_A205, 0, 1, 0, ANY_ID, "yamato_pm4.fw", "yamato_pfp.fw", &adreno_a2xx_gpudev, - 512, 384}, + 512, 384, 3}, { ADRENO_REV_A220, 2, 1, ANY_ID, ANY_ID, "leia_pm4_470.fw", "leia_pfp_470.fw", &adreno_a2xx_gpudev, - 512, 384}, + 512, 384, 3}, /* * patchlevel 5 (8960v2) needs special pm4 firmware to work around * a hardware problem. */ { ADRENO_REV_A225, 2, 2, 0, 5, "a225p5_pm4.fw", "a225_pfp.fw", &adreno_a2xx_gpudev, - 1536, 768 }, + 1536, 768, 3 }, { ADRENO_REV_A225, 2, 2, 0, 6, "a225_pm4.fw", "a225_pfp.fw", &adreno_a2xx_gpudev, - 1536, 768 }, + 1536, 768, 3 }, { ADRENO_REV_A225, 2, 2, ANY_ID, ANY_ID, "a225_pm4.fw", "a225_pfp.fw", &adreno_a2xx_gpudev, - 1536, 768 }, + 1536, 768, 3 }, + /* A3XX doesn't use the pix_shader_start */ { ADRENO_REV_A320, 3, 1, ANY_ID, ANY_ID, - "a300_pm4.fw", "a300_pfp.fw", &adreno_a3xx_gpudev }, + "a300_pm4.fw", "a300_pfp.fw", &adreno_a3xx_gpudev, + 512, 0, 2 }, + }; static irqreturn_t adreno_isr(int irq, void *data) diff --git a/drivers/gpu/msm/adreno.h b/drivers/gpu/msm/adreno.h index 7c5cb7a4..3bf9b3b5 100755 --- a/drivers/gpu/msm/adreno.h +++ b/drivers/gpu/msm/adreno.h @@ -39,11 +39,7 @@ #define ADRENO_DEFAULT_PWRSCALE_POLICY NULL #endif -/* - * constants for the size of shader instructions - */ -#define ADRENO_ISTORE_BYTES 12 -#define ADRENO_ISTORE_WORDS 3 +#define ADRENO_ISTORE_START 0x5000 /* Istore offset */ enum adreno_gpurev { ADRENO_REV_UNKNOWN = 0, @@ -74,6 +70,7 @@ struct adreno_device { unsigned int wait_timeout; unsigned int istore_size; unsigned int pix_shader_start; + unsigned int instruction_size; }; struct adreno_gpudev { diff --git a/drivers/gpu/msm/adreno_a2xx.c b/drivers/gpu/msm/adreno_a2xx.c index bc55bd51..8486aae2 100755 --- a/drivers/gpu/msm/adreno_a2xx.c +++ b/drivers/gpu/msm/adreno_a2xx.c @@ -94,7 +94,8 @@ static inline int _shader_shadow_size(struct adreno_device *adreno_dev) { - return adreno_dev->istore_size*ADRENO_ISTORE_BYTES; + return adreno_dev->istore_size * + (adreno_dev->instruction_size * sizeof(unsigned int)); } static inline int _context_size(struct adreno_device *adreno_dev) diff --git a/drivers/gpu/msm/adreno_a3xx.c b/drivers/gpu/msm/adreno_a3xx.c index cbc7bed4..60e870f4 100755 --- a/drivers/gpu/msm/adreno_a3xx.c +++ b/drivers/gpu/msm/adreno_a3xx.c @@ -2502,6 +2502,9 @@ static void a3xx_start(struct adreno_device *adreno_dev) { struct kgsl_device *device = &adreno_dev->dev; + /* GMEM size on A320 is 512K */ + adreno_dev->gmemspace.sizebytes = SZ_512K; + /* Reset the core */ adreno_regwrite(device, A3XX_RBBM_SW_RESET_CMD, 0x00000001); diff --git a/drivers/gpu/msm/adreno_debugfs.c b/drivers/gpu/msm/adreno_debugfs.c index 419ce9d2..9a136699 100755 --- a/drivers/gpu/msm/adreno_debugfs.c +++ b/drivers/gpu/msm/adreno_debugfs.c @@ -239,7 +239,8 @@ static ssize_t kgsl_istore_read( return 0; adreno_dev = ADRENO_DEVICE(device); - count = adreno_dev->istore_size * ADRENO_ISTORE_WORDS; + count = adreno_dev->istore_size * adreno_dev->instruction_size; + remaining = count; for (i = 0; i < count; i += rowc) { unsigned int vals[rowc];